![]() ![]() ![]() (Protip: that's for "transient limited", functional insulation - the stuff between traces on the line side. ![]() Clearance should go up by about 10 mil per 50V, so line operated stuff needs 30-50 mil clearance. Ultimately, you're responsible for your own vigilance. And don't count on cheap fabs to do thorough electrical testing - you get what you pay for. More clearance in more places is less chance for electrical failures. It's worth following, even if you break the rule in some places by necessity (like that damn part you can only find in 0.5mm pitch TQFP). I go with 10 or even 12 or 15 for "I don't need anything special" rules. Likewise, trace width/space minimum is around 6 or 7 mil for most fabs. Cheap fabs will either upsize them anyway, or charge more for teensy holes - a practical "I don't need anything special" minimum is 12 mil hole, 30 mil pad (that's almost a full 10 mil annular ring - their drilling can be total shit and you'll still get a good ring around the hole). Standard minimum is 8 mil hole, 5 mil annular ring (= 18 mil pad). Minimum via size is a manufacturing issue. You don't get much heat out of a PCB, but you can at least dissipate 2, maybe 3W safely with up to 2 in^2 of copper pour per transistor (up to maybe 4W and 4 in^2 if you splurge for 2oz copper). Yes, the datasheet says 200W or something stupid like that, and yes they lie. As shown, you'll get about a watt of dissipation in each transistor before magic smoke. More important though is to have lots of extra copper area on the tabs. Shouldn't need to bring out D/2PAKs until 12V/10A+ range, I think? Trace width is OK but as long as you have the space, you can always go bigger. though you might want a power package (SOT-89, -223 or SO-8 range) to have a couple microseconds leeway before they poof, in case of poof-inducing conditions. You can get SOT-23s that'll handle that with aplomb. Schematic? At 2A, the choice of MOSFET seems strange. What is recommended for SMT? Is this a place where you put copper on both sides and via stitch it? And what about the vias anyway? Are they too small or are they actually right for the larger traces? Thanks for any more suggestions! With through-hole ones I know the normal idea is to stand them up and tie bind the heat sink onto the metal in the rear. How to cool MOSFETs with respect to the PCB? My brilliant idea was just to throw a heat sink on them if necessary. Am I overrating the barrel jack? I don't know what the recommendation on that is, I got those as no-name no-datasheet parts. The current comes in the DC barrel jack, top left corner, out the 5mm headers which are rated for 20A. But what do you suggest here? What do you mean by footprint - just give it more space on the PCB? Or make some of the copper larger and via stitch that too? 90 degree traces are bad? Should I break those down to 45? Does it really matter for logic traces? 2A is a little bit too much for 2.54mm headers? I don't understand. But now that I think about it, it may be completely unwise to hang the driver IC off the microcontroller so I think I should put a dedicated regulator on there. That regulator is providing 5V for the microcontroller and the microcontroller is providing 3.3V to the QFN. It is supposed to be connected to ground and is not. Also, thanks for bringing my attention to it. There are smaller bypassing caps all over the place, the big cap is meant for the power section up top. God knows if this is the right value, it's only a guess. I had to smash it to move the pads around a bit and it lost the label. There are through holes for a 2200uF/16V electrolytic cap to the right of the barrel jack in the top left. ![]()
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